LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 1 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? D E S C R I P T I O N The LX1676 is a highly integrated VRM power supply controller IC featuring two PWM switching regulator stages. The two constant frequency voltage-mode PWM phases are configured as a single biphase high current output core supply. In biphase operation, the high current (>25A) output is generated by a LoadSHARETM ? technique that balances the currents in the two phases. Power loss and noise, due to the ESR of the input capacitors, are minimized by operating the PWMs 180° out of phase. A synchronized Transient Correction Loop? provides except- ional control of the output droop and overshoot during very high di/dt load changes, the circuit can be configured for droop only, overshoot only or both. This architecture also minimizes capacitor requirements while maximizing regulator response. A true differential input amplifier is used for remote voltage sensing at the processor core. A VID code generator provides an internal reference that will set the output voltage. This VID code can be changed during operation and the reference will slew the output voltage to its new setting at a preset rate. During VID changes on the fly the Power Good indication will stay valid. Current through the lower phase 1 MOSFET will be sampled using its RDS(ON) for current limit and shut down. For further protection, an over voltage circuit will trip at a specified setting and clamp the output by turning off the upper MOSFETs and turning on the lower MOSFETs. The upper MOSFET drivers will use a bootstrap capacitor to provide the upper drive voltage over the input voltage range of 6 to 24 volts. IMPORTANT: For the most current data, consult MICROSEMI's website: http://www.microsemi.com ? Patent numbers US6292378,US6285571,US6356063, US6605931 K E Y F E A T U R E S ? High Current Biphase Operation ? Outputs As Low As 0.925V ? ? Biphase LoadSHARETM ? ? Transient Correction Loop Reduces Required Capacitance ? Differential Amplifier For Remote Voltage Sensing ? Integrated High Current MOSFET Drivers ? 200KHz to 1MHz Frequency Operation ? Programmable Slew Rate Control For Start-Up Sequence and VID change ? VID Changes On The Fly ? Power Good Indicator ? Short Circuit Protection ? Output Over Voltage and Under Voltage Protection ? No current-sense resistors A P P L I C A T I O N S ? AMD Mobile Athlon? or Duron? Processor Core Voltage Supply ? Voltage Regulator Modules P R O D U C T H I G H L I G H T L X 1 6 7 6 5 B i t V I D 7 0 n H T r a n s i e n t C o r r e c t i o n L o o p V i n 6 t o 2 4 V V i n 6 t o 2 4 V V o u t V i n + 5 V P A C K A G E O R D E R I N F O PW Plastic TSSOP 38-Pin LQ Plastic MLPQ 38-Pin TJ (°C) RoHS Compliant / Pb-free Transition DC: 0518 RoHS Compliant / Pb-free Transition DC: 0512 0 to 70 LX1676CPW LX1676CLQ Note: Available in Tape & Reel. Append the letters "TR" to the part number. (i.e. LX1676CLQ-TR) L L X X 1 1 6 6 7 7 6 6 LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 2 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? A B S O L U T E M A X I M U M R A T I N G S Supply Input Voltage (VCCL, VCC)0.3V to 6.0V Battery Input Voltage (VIN)0.3V to 24V Current Limit Sense (ILIM1, ILIM3)0.3V to 30V Topside Driver Supply Input Voltage (VC1, VC2, VC3)0.3 toVSx + 6.0V Topside Driver Return Input Voltage (VS1, VS2)5V to 24V Differential Sense Input Voltage (FB+, FB-0.3V to 6.0V VID0 – VID4, Input Voltage 0.3V to 6V High Side Driver Peak (<500ns) Current (HO1/2, I-MAX)1A Low Side Driver Peak (<500ns) Sink Current (LO1/2, I-MIN)1.5A Operating Junction Temperature.150°C Storage Temperature Range.65°C to 150°C Lead Temperature (Soldering 10 seconds)300°C RoHS Peak Package Solder Reflow Temperature (40 second maximum exposure)260°C (+0, -5) Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of specified terminal. P A C K A G E P I N O U T 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 FB- DFOUT EO1 EA1- DACOUT PWGD GND ROSC ENA VID4 VID3 PGN3 I-MIN VCCL LO2 PGN LO1 VS1 HO1 VC1 VC3 I-MAX ILIM3 ILIM1 LP1 LP2 EA2- EO2 FB+ VID2 VID1 VID0 VS2 HO2 VC2 VCC VIN VS3 Connect Bottom to Power GND LQ PACKAGE (Top View) 1 19 38 20 EA2- EO2 FB+ FB- DFOUT EO1 EA1- DACOUT PWGD GND VIN ROSC ENA VID4 VID3 VID2 VID1 VID0 VS2 HO2 VC2 VCC PGN3 I-MIN VCCL LO1 VS1 VC1 VC3 I-MAX VS3 ILIM3 ILIM1 LP1 LP2 LO2 PGN HO1 PW PACKAGE (Top View) RoHS / Pb-free 100% Matte Tin Lead Finish R E C O M M E N D E D O P E R A T I N G C O N D I T I O N S LX1676 Parameter Symbol Min Typ Max Units ` IC Input Supply Voltage VCC 4.5 5.5 V Battery Input Voltage VIN 5.7 24.0 V Biphase Topside Driver Return Voltage VS1, VS2 0 24.0 V Transient Correction Phase Driver Return Voltage VS3 0 5.5 V P P A A C C K K A A G G E E D D A A T T A A LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 3 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? F U N C T I O N A L P I N D E S C R I P T I O N Name Description FB+ Differential Amplifier Positive Input – Feedback from output FB- Differential Amplifier Negative Input – Feedback from output DFOUT Differential Amplifier Output EA1- Phase 1 Error Amplifier Negative Input EO1 Phase 1 Error Amplifier Output GND Analog Ground ROSC A resister to ground sets PWM frequency ENA Enable Input – Logic Low disables all converter phases DACOUT DAC Output voltage – 50uA bi-directional current source VID4 Digital Input for VID code – Has an internal pull-up resister VID3 Digital Input for VID code – Has an internal pull-up resister VID2 Digital Input for VID code – Has an internal pull-up resister VID1 Digital Input for VID code – Has an internal pull-up resister VID0 Digital Input for VID code – Has an internal pull-up resister PWGD Power Good Output Pin – Open drain output pin for power good indication. High = Power Good VCC IC Supply Voltage. Nominal +5V VC3 Supply for transient correction phase upper MOSFET driver, bootstrap voltage PGN3 Power ground pin for Transient Correction Loop driver I-MIN Output Driver for lower Transient Correction Loop MOSFET VS3 Low side of upper driver for Transient Correction Loop – MOSFET Driver power return I-MAX Output Driver for upper Transient Correction Loop MOSFET ILIM3 Transient Correction Loop current sense – A resister sets an upper limit for over current detection and shut down. LP1 Phase 2 differential amplifier positive input, filtered feedback from phase 1 output EA2- Negative Input of phase 2 integrating amplifier EO2 Output of phase 2 integrating amplifier LP2 Phase 2 differential amplifier negative input, filtered feedback from phase 2 output VIN Battery Voltage Input. LO2 Driver Output for phase 2 lower MOSFET VS2 Low side of upper gate driver for phase 2. HO2 Driver Output for phase 2 upper MOSFET VC2 Supply for phase 2 upper MOSFET driver, bootstrap voltage PGN Power ground pin for current sensing of lower MOSFET RDS(ON) for phase 1. LO1 Driver Output for phase 1 lower MOSFET ILIM1 Over-Current Limit Set – A resister sets an upper limit for over current detection and shut down. VS1 Low side of upper gate driver for phase #1. HO1 Driver Output for phase 1 upper MOSFET VC1 Supply for phase 1 upper MOSFET driver, bootstrap voltage VCCL Voltage bus for the lower MOSFET drivers. Nominal +5V P P A A C C K K A A G G E E D D A A T T A A LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 4 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? E L E C T R I C A L C H A R A C T E R I S T I C S Unless otherwise specified, the following specifications apply over the operating ambient temperature 0°C ≤ TA ≤ 70°C except where otherwise noted and the following test conditions: VCC = 5V, VCCL = 5V, VIN = 12V, Switching Frequency = 500KHz. LX1676 Parameter Symbol Test Conditions Min Typ Max Units ` REGULATOR ENA = VCC, FB+ = FB- 1 5 9 mA IC Supply Current IQ(VCC) ENA = GND 1 ?A Low Side Driver Operating Current IQ(VCCL) ENA = VCC, FB+ = FB- 0.5 1 mA High Side Driver Operating Current IQ(VCx) ENA = VCC, FB+ = FB- 2 4 mA ` ERROR AMPLIFIER: PHASE 1 Input Offset Voltage VOS Common Mode Voltage (VCM) = 1.4V -6 6 mV Input Bias Current IEA1 -100 100 nA DC Open Loop Gain 60 70 dB Input Common Mode Range VICM CMRR > 50dB 0.8 2.5 V VEO1(MAX) IEA1 = 2mA 4.0 Output Voltage Swing VEO1(MIN) IEA1 = -20uA 0.15 0.5 V Unity Gain Bandwidth UGBW 20 MHz ` DIFFERENTIAL AMPLIFIER Input Offset Voltage VOS VCM=1.4V -6 6 mV Gain ADA 0.99 1 1.01 V/V Common Mode Rejection Ratio CMRRDA 0.8V < VCM < 2.5V 65 dB Input Resistance RIN Measured at FB+ Input 30 K? Input Common Mode Range VCM 0 3 V Source / Sink Current VDFOUT = 0V 5 mA VDFOUT(MAX) IDFOUT = 2mA 4.0 Output Voltage Swing VDFOUT (MIN) IEA1 = -20uA 0.2 V Unity Gain Bandwidth UGBW 10 MHz Slew Rate SR 5 V/?s ` OSCILLATOR Maximum Clock Frequency fMAX RPWM=10k? 0.9 1 1.1 MHz Minimum Clock Frequency fMIN RPWM=50k? 180 200 220 KHz Frequency Stability 4 % ` PWM OUTPUT During Transient Correction Switching 100 Maximum Duty Cycle DCMAX Transient Correction Not Switching 40 50 % Minimum Pulse Width tPWM(MIN) 3000pF Load 60 nS Dead Time 3000pF Load at 50% of VCCL 50 80 200 nS VIN = 6V 0.70 VIN = 12 1.40 Ramp Amplitude VRAMP VIN = 24 V 2.80 V ` PHASE 2 INTEGRATING AMPLIFIER Input Offset Voltage VOS VCM=1.4V -6 6 M V DC Open Loop Gain 70 dB VEO2(MAX) IEA2 = 2mA 4.0 Output Voltage Swing VEO2(MIN) IEA2 = -20uA 0.15 0.5 V Unity Gain Bandwidth UGBW 20 MHz E E L L E E C C T T R R I I C C A A L L S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 5 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? E L E C T R I C A L C H A R A C T E R I S T I C S ( C O N T I N U E D ) Unless otherwise specified, the following specifications apply over the operating ambient temperature 0°C ≤ TA ≤ 70°C except where otherwise noted and the following test conditions: VCC = 5V, VCCL = 5V, VIN = 12V, Switching Frequency = 500KHz. LX1676 Parameter Symbol Test Conditions Min Typ Max Units ` PHASE 2 DIFFERENTIAL AMPLIFIER Input Offset Voltage VOS LP1=LP2 -6 6 mV Gain ADA 0.98 1 1.02 V/V Common Mode Rejection Ratio CMRRDA Common Mode Voltage = 0 to 2 V 60 dB Input Resistance RB 180 K? Unity Gain Bandwidth UGBW 4 MHz ` TRANSIENT CONTROL LOOP Voltage Droop Sense Propagation Delay : FB+ and FB- to I-MAX 50 nS Voltage Overshoot Sense Propagation Delay : FB+ and FB- to I-MIN 50 nS Voltage Droop Sense Threshold VDFOUT Rising 3000pF Load 40 mV Voltage Overshoot Sense Threshold VDFOUT Falling 3000pF Load 40 mV ` OUTPUT DRIVERS Driver ? Rise Time ? Fall Time tRISE tFALL CL = 3000pF, VCx - VSx = 5V 50 50 nS High Side Driver Voltage: [VHOx - VVSx] ? Drive High ? Drive Low VHOx = 20mA, VCx - VSx = 5.0 V VHOx = -20mA, VCx - VSx = 5.0 V 4.8 4.9 0.1 0.2 V Low Side Driver Voltage: [VLOx – VPGN] ? Drive High ? Drive Low VLOx = 20mA, VCCL - VPGN = 5.0 V VLOx = -20mA, VCCL - VPGN = 5.0 V 4.8 4.9 0.1 0.2 V High Side Driver Current IHOx VCx - VSx = 5.0 V, Load = 3300pf at <500nSec 1 A Lower MOSFET Driver Current ILOx VCCL - PGN = 5.0 V, Load = 3300pf at <500nSec 1.5 A ` PHASE 1 OVER CURRENT PROTECTION Current Sense Bias Current IILIM1 44 50 60 ?A Current Sense Delay tCSD(ILIM1) 200 400 500 nS ` TRANSIENT CORRECTION LOOP OVER CURRENT PROTECTION Current Sense Bias Current IILIM3 40 50 60 ?A Current Sense Delay tCSD(ILIM3) 200 400 500 nS ` ENABLE INPUT / VOLTAGE IDENTIFICATION (VID) Logic Low Threshold 1.5 V Hysteresis 0.3 V Pullup Resistance 100 K? ` POWER GOOD Low Output Voltage VPWGD IPWGD = -3mA 0.5 V E E L L E E C C T T R R I I C C A A L L S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 6 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? E L E C T R I C A L C H A R A C T E R I S T I C S ( C O N T I N U E D ) Unless otherwise specified, the following specifications apply over the operating ambient temperature 0°C ≤ TA ≤ 70°C except where otherwise noted and the following test conditions: VCC = 5V, VCCL = 5V, VIN = 12V, Switching Frequency = 500KHz. LX1676 Parameter Symbol Test Conditions Min Typ Max Units ` UVLO VCC ? Threshold ? Hysteresis VCC Rising 4.2 0.3 VIN ? Threshold ? Hysteresis VIN Rising 5.5 0.3 V ` OVER VOLTAGE PROTECTION Over Voltage Threshold - 2.35 V ` UNDER VOLTAGE PROTECTION Under Voltage Threshold 0.800 V ` DAC 1 ≤ VDACOUT ≤1.4 1 Initial DACOUT Accuracy 0.925 ≤ VDACOUT < 1 1.4 < VDACOUT ≤ 2 2 % High Side Driver Current IHOx VCx - VSx = 5.0 V, Load = 3300pf at <500nSec 1 A Lower MOSFET Driver Current ILOx VCCL - PGN = 5.0 V, Load = 3300pf at <500nSec 1.5 A VID Logic High Threshold 0.5 1.3 2 V VID Hysteresis 0.3 V V O L T A G E I D E N T I F I C A T I O N ( V I D ) C O D E VID[4:0] VOUT (V) VID[4:0] VOUT (V) 00000 2.000 10000 1.275 00001 1.950 10001 1.250 00010 1.900 10010 1.225 00011 1.850 10011 1.200 00100 1.800 10100 1.175 00101 1.750 10101 1.150 00110 1.700 10110 1.125 00111 1.650 10111 1.100 01000 1.600 11000 1.075 01001 1.550 11001 1.050 01010 1.500 11010 1.025 01011 1.450 11011 1.000 01100 1.400 11100 0.975 01101 1.350 11101 0.950 01110 1.300 11110 0.925 01111 Shutdown 11111 Shutdown E E L L E E C C T T R R I I C C A A L L S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 7 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? S I M P L I F I E D B L O C K D I A G R A M + - 0.85 2.35 + - + - UV OV Band- gap UVLO VCC VIN + - R S S R gm IMAX IMIN GND VCC ROSC VIN PWGD VID4 VID3 VID2 VID1 VID0 DACOUT FB + FB - VCCL VC1 HO1 LO1 VS1 PGN HO2 VS2 LO2 VCCL PGOOD S R S S S 0° LP2 LP1 ENA ENA VC3 I-Max VS3 I-Min PGN3 EO1 EA1 - DFOUT EO2 EA2 - 50?A VC2 + - + - Bandgap 180° DACOUT - 30mV + + + _ _ 35mV offset DACOUT DAC AMP FRQ OSC VIN 180° 0° + _ _ _ + Diff Amp Phase 1 Error Amp Phase 2 Differential Amp Phase 2 Integrating Amp S DACOUT 35mV offset 100K 90K 90K 90K 90K POR PGOOD Q Q I-MAX I-MAX I-MIN I-MIN ILIM ILIM ILIM ILIM3 ILIM1 PGN VS3 Fault B B L L O O C C K K D D I I A A G G R R A A M M LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 8 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? A P P L I C A T I O N C I R C U I T S LX1676 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 CORE FB- R6 4.02K R7 100K CORE FB- C5 0.22?F C4 4700pF Q1 NDS7002A R9 10K Q2 NDS7002A +5VP C7 10?F 25V VBAT R10 45.3K PWRGD EN R13 100K R14 100K R15 100K R16 100K R17 100K 2.5V VID(4) VID(3) VID(2) VID(1) VID(0) R1 2K C1 4700pF C2 4700pF R2 61.9K C3 4700pF R3 61.9K R4 4.02K R5 4.02K R21 10 Ohm C8 4.7?F 6.3V +5VP C9 4.7?F 6.3V C10 4.7?F 6.3V C11 4.7?F 6.3V Q3 IRF7811W C12 0.22?F CR3 UPS5817 +5VP C13 47?f 6.3v CR1 SK32 CR2 SK32 L3 70?H Q4 IRF7811W FB- DFOUT EO1 EA1- DACOUT PWRGD GND VIN ROSC ENA VID4 VID3 VID2 VID1 VID0 VS2 HO2 VC2 VCC PGN3 FB+ EO2 EA2- LP2 LP1 ILIM ILIM3 VS3 I-MAX VC3 VC1 HO1 VS1 LO1 PGN LO2 VCCL I-MIN Q5 IRF7811W Q6 IRF7822 VBAT C20 10?F 25V C19 10?F 25V C21 10?F 25V C105 10?F C15 0.22?F C4 UPS5817 +5VP Q7 IRF7822 CR8 N/U L1 3.3?H Q8 IRF7811W VBAT C23 10?F 25V C22 10?F 25V C24 10?F 25V C104 10?F Q9 IRF7822 Q10 IRF7822 CR7 N/U L2 3.3?H C17 0.22?F CR5 UPS5817 +5VP C25 VCORE VCORE RTN +5VP C103 47?F 6.3V VBAT C18 10?F 25V NOTE: Q7 & Q10 Optional C25 Several Capacitors Under Processor Socket Figure 2– Typical VRM Application A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 9 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? T H E O R Y O F O P E R A T I O N GENERAL DESCRIPTION The LX1676 is a voltage-mode pulse-width modulation controller integrated circuit. The PWM frequency is programmable from 200kHz to 1MHz. The device has external compensation, for more flexibility of the loop response. The LX1676 also makes use of a true differential input amplifier for remote voltage sensing at the actual processor core. This is a very important feature now that the core voltages are in the 1 to 2 volt range. The reference for the biphase PWM output is a 5 bit VID code DAC. The VID code DAC can generate a reference voltage of 0.925 to 2.000 volts. The output of the DAC is a bi-directional current source and is connected to the DACOUT pin. Connecting a capacitor from this pin to ground will generate a linear ramp, which will determine the rate of change of the output voltage. The rate of change can be set so that the current required to charge the total output capacitance is below the maximum current limit trip point. This will allow VID changes on the fly without tripping the over current sensor. POWER UP AND INITIALIZATION At power up, the LX1676 monitors the supply voltage to VCC and Vin, Before both supplies reach their under- voltage lock-out (UVLO) thresholds, a power on reset condition will prevent soft-start from beginning, the oscillator is disabled and all MOSFETs are kept off. SOFT-START Once the supplies are above the UVLO threshold and the Enable pin is brought high, the soft-start capacitor begins to be charged up by the reference DAC through the DACOUT pin. The capacitor voltage at the DACOUT pin rises as a linear ramp. The DACOUT pin is connected to the error amplifier's non-inverting input which controls the output voltage. The output voltage will follow the DACOUT pin voltage. Phase 3 (hysteretic phase) is disabled during soft-start. OVER-CURRENT PROTECTION There are two separate current limit circuits in the LX1676. One looks at the phase 1 lower MOSFET drain current and the second looks at the phase 3 upper MOSFET drain current. Both circuits have a 400 nS delay before a current limit command is issued to the current limit latch, once set the current limit latch will hold all three phases off until it is reset. The Over-Current Protection is disabled during positive VID changes. To reset the current limit latch either the enable command (ENA) must be cycled low then back high or the input power must cycle off and then back on. OVER-CURRENT PROTECTION (PHASE 1) The phase 1 current limit uses the RDS(ON) of the lower MOSFET, together with a resistor (RSET) to set the actual current limit point. The current limit comparator senses the current 400 nS after the lower MOSFET is switched on. A current source supplies a current (ISET), of 50?A which flows into RSET and determines the current limit trip point. The value of RSET is selected to set the current limit for the application. Phase 1 RSET is calculated by: A 50 R ILimit R DS(ON) SET ? ? = The current limit comparator will trip when the drop across RSET equals the drop across the lower MOSFET RDS(ON)., at this time the comparator outputs a signal to set the I limit latch and removes the enable command. The Over-Current sensing is done on phase 1 only because phase 2 current is always being forced to equal the phase 1 current, therefore the current trip point is set at half of the desired current limit. For an output current limit setting of 30 amps, the current trip point for phase 1 is set at 15 amps. When the phase 1 over current latch is set all three phases are disabled, all MOSFETs are turned off. Vout 50 uA + _ RSET Q2 Q2 Current Flow + + _ _ Iout Current Limit Comparator Q1 Vin RDS(ON) 400nSec Delay Figure 3 – Phase 1 Current Limit The delay before current limit is activated will result in current pulses exceeding the calculated values during the delay period if a short circuit is applied during that time. A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 10 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? T H E O R Y O F O P E R A T I O N ( C O N T I N U E D ) OVER-CURRENT PROTECTION (PHASE 3) The hysteretic phase has its own current limit protection because with it's very fast response time with a 100 nH inductor the upper MOSFET cannot be allowed to stay on during an output short circuit condition. The phase 3 over- current sensing uses the RDS(ON) of the upper MOSFET with a resistor RSET to determine the over current limit point. A current source draws 50uA through RSET which determines the required drop across the MOSFET RDS(ON) to initiate a current limit condition. 50 uA + _ RSET Q2 + + _ _ Current Limit Comparator Q1 Vin RDS(ON) Vout 400nS Delay ILIM3 VS3 Figure 4 – Phase 3 Current Limit Phase 3 RSET is calculated by: uA 50 RDSon ILimit Rset ? = OVER VOLTAGE PROTECTION An over voltage protection circuit monitors the output voltage and will latch all three phases off if an over voltage condition (greater than 2.35 V) is detected. Both MOSFETs for phase 3 will be held off and the lower MOSFETs for phase 1 and 2 will be held on to discharge the output capacitor till the output voltage drops below .85 volt, at .85 volts all MOSFETs will be turned off. FAULT LOGIC There are a number of possible states that will cause a fault condition that will disable the output MOSFET drivers. A fault condition will be caused by the following: ? Enable (ENA) pin being pulled low ? Over-current condition on either phase 1 or phase 3 ? Over Voltage output > 2.35V ? Under Voltage output < 0.85V In all cases except Over Voltage all MOSFET drivers will be latched off. For an Over Voltage fault the lower MOSFETs for phase 1 and 2 will be held on to discharge the bulk capacitance on the output till a lower limit of .85 volts is reached then all MOSFETS will be turned off. To reset a fault it necessary to cycle the ENA pin low then back high or remove and reapply the input voltage VIN. The Under Voltage monitor is not enabled until the output voltage has ramped up to the level commanded by the DACOUT pin and the PWGD output in high. PWM FREQUENCY An external resistor sets the PWM frequency from the ROSC pin to ground. The equation for ROSC is: ( ) 9 e 100 f K 1 ROSC ? + ? = where ROSC is in K?, f is in Hz, K=105e-12 A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 11 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? T H E O R Y O F O P E R A T I O N ( C O N T I N U E D ) THEORY OF OPERATION FOR A BI-PHASE, LOADSHARETM CONFIGURATION The basic principle used in LoadSHARETM in a multiple phase buck converter topology is that if multiple, identical, inductors have the same identical voltage impressed across their leads, they must then have the same identical current passing through them. The current that we would like to balance between inductors is mainly the DC component along with as much as possible the transient current. All inductors in a multiphase buck converter topology have their output side tied together at the output filter capacitors. Therefore this side of all the inductors has the same identical voltage. If the input side of the inductors can be forced to have the same equivalent DC potential on this lead, then they will have the same DC current flowing. To achieve this requirement, phase 1 will be the control phase that sets the output operating voltage, under normal PWM operation. To force the current of phase 2 to be equal to the current of phase 1; a second feedback loop is used. Phase 2 has a low pass filter connected from the input side of each inductor. This side of the inductors has a square wave signal that is proportional to its duty cycle. The output of each LPF is a DC (+ some AC) signal that is proportional to the magnitude and duty cycle of its respective inductor signal. The second feedback loop will use the output of the phase 1 LPF as a reference signal for an error amplifier that will compare this reference to the output of the phase 2 LPF. This error signal will be amplified and used to control the PWM circuit of phase 2. Therefore, the duty cycle of phase 2 will be set so that the equivalent voltage potential will be forced across the phase 2 inductor as compared to the phase 1 inductor. This will force the current in the phase 2 inductor to follow and equal the phase 1 inductor current. With the LoadSHARETM topology it is possible to imbalance the phases so that one phase will supply more current than the other under unique situations. The LX1676 will normally be used with the same supply voltages on phase 1 and 2 PWM inputs and will have equal currents in both phases. + - LP2 LP1 Phase 1 Comparator + _ + _ + - gm Phase 2 Comparator 0° 180° Phase 2 Integrating Amp Differential Amp + - DC Bias Phase 1 Error Amp + - PWM PWM HO1 EA - EO2 LO1 LO2 HO2 Phase 1 Low Pass Filter Phase 2 Low Pass Filter Vout DC Bias DC Bias DACOUT Differential Feedbach From Vout Phase 1 Diff Amp Ramp .75 V to 3 V Both PWMs Figure 5 – LoadSHARE Control Loop A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 12 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? T H E O R Y O F O P E R A T I O N ( C O N T I N U E D ) LOOP GAIN AUTOMATIC COMPENSATION The PWM ramp shown in Figure 5 is automatically adjusted to keep its amplitude fixed ratio to Vin over the range of 6 to 24 V input. This maintains a constant loop gain that is set by the feedback networks around the error amplifiers independent of PWM input voltage. TRANSIENT CORRECTION LOOP Phase 3 is a Transient Correction Loop that can sum a large amount of current into the output node when required by an out of range condition. The differential feedback summing amplifier is connected directly to the output terminals and has sufficient bandwidth to follow any fast changes in output voltage. The feedback error voltage is compared to the commanded reference voltage (DACOUT) by two high speed comparators, I-Max and I-Min. The other inputs of these comparators are offset from the DACOUT as shown in Fig 6. If the error in output voltage exceeds the offset in either direction the appropriate MOSFET will be turned on to force current into or out of the output node to correct the voltage error. The very low value inductor (100nH) allows large amounts of current to be forced into or out of the output node very quickly. When the Transient Correction Loop is switching it forces the appropriate upper or lower MOSFETs in phases 1 and 2 to stay on (100% or 0% duty cycle) until the error is corrected. The two drivers for the Transient Correction Loop have outputs (I-Max) and (I-Min) that may be used to drive a half bridge to correct for both low and high output voltage conditions. This permits pulling the output low if an overshoot occurs due to a rapid reduction in load current. With a conventional Buck regulator rapid changes in the negative direction are not possible due to the low voltage available as a forcing function. The two outputs (I-MAX and I-MIN) are completely independent. A single MOSFET and diode can be used to correct for voltage droop only or voltage overshoot only when driven by the appropriate output. If the I-MAX driver is not used the VC3 and VS3 pins must be connected to +5 volts. Under normal operation the Transient Correction phase is only active for a very brief time during high di/dt loads on the output. VC3 I-Min PGN3 - 35mV 35mV VS3 I-Max VCCL I-Min Comparator I-Max Comparator FB- FB+ + - DACOUT Differential Feedback FromOutput + + - 70nH Vout +5 Figure 6 – Phase 3 Transient Correction Loop A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 13 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? A P P L I C A T I O N N O T E OUTPUT INDUCTOR The output inductor should be selected to meet the requirements of the output voltage ripple in steady-state operation and the inductor current slew-rate during transient. The peak-to-peak output voltage ripple is: RIPPLE RIPPLE I ESR V * = where s D L V V ?I OUT IN f * ? = ?I is the inductor ripple current, L is the output inductor value and ESR is the Effective Series Resistance of the output capacitor. ?I should typically be in the range of 20% to 40% of the maximum output current. Higher inductance results in lower output voltage ripple, allowing slightly higher ESR to satisfy the transient specification. Higher inductance also slows the inductor current slew rate in response to the load- current step change, ?I, resulting in more output-capacitor voltage droop. When using electrolytic capacitors, the capacitor voltage droop is usually negligible, due to the large capacitance The inductor-current rise and fall times are: ( ) OUT IN RISE V V ?I L T ? * = and OUT FALL V ?I L T * = . The inductance value can be calculated by: s D ?I V V L OUT IN f * ? = OUTPUT CAPACITOR The output capacitor is sized to meet ripple and transient performance specifications. Effective Series Resistance (ESR) is a critical parameter. When a step load current occurs, the output voltage will have a step that equals the product of the ESR and the current step, ?I. In an advanced microprocessor power supply, the output capacitor is usually selected from ESR instead of capacitance or RMS current capability. A capacitor that satisfies the ESR requirements usually has a larger capacitance and current capability than strictly needed The allowed ESR can be found by: ( ) EX RIPPLE V ?I I ESR < + * Where IRIPPLE is the inductor ripple current, ?I is the maximum load current step change, and VEX is the allowed output voltage excursion in the transient. Electrolytic capacitors can be used for the output capacitor, but are less stable with age than tantalum capacitors. As they age, their ESR degrades, reducing the system performance and increasing the risk of failure. It is recommended that multiple parallel capacitors be used, so that, as ESR increase with age, overall performance will still meet the processor's requirements. There is frequently strong pressure to use the least expensive components possible, however, this could lead to degraded long-term reliability, especially in the case of filter capacitors. Microsemi's demonstration boards use the CDE Polymer AL-EL (ESRE) filter capacitors, which are aluminum electrolytic, and have demonstrated reliability. The OS-CON series from Sanyo generally provides the very best performance in terms of long term ESR stability and general reliability, but at a substantial cost penalty. The CDE Polymer AL-EL (ESRE) filter series provides excellent ESR performance at a reasonable cost. Beware of off-brand, very low-cost filter capacitors, which have been shown to degrade in both ESR and general electrolytic characteristics over time. INPUT CAPACITOR The input capacitor and the input inductor, if used, are to filter the pulsating current generated by the buck converter to reduce interference to other circuits connected to the same 5V rail. In addition, the input capacitor provides local de-coupling for the buck converter. The capacitor should be rated to handle the RMS input current requirement. The RMS input current is: d) 5 . 0 d( I I L RMS ? = for d < 0.5 Where IL is the inductor current and d is the duty cycle. The maximum RMS value of 0.25IL will occur when d = 25% or 75%. A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 14 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? A P P L I C A T I O N N O T E ( C O N T I N U E D ) SOFT-START CAPACITOR An external soft-start capacitor is connected to the DACOUT pin and will be charged, or discharged, at a linear rate by the internal 50uA bi-directional current source after the UVLO circuit has been satisfied. Whenever the VID code is changed during normal operation the soft-start capacitor will determine the rate of change at the output. PROGRAMMING THE OUTPUT VOLTAGE Output voltage is determined by the internal 5 bit DAC. The DAC inputs are the Voltage Identification (VID) 0-4 lines, the VID table lists the available output voltages for the corresponding VID codes. There are no external resistor dividers to program output voltage and only the steps listed are available. A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 15 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? P A C K A G E D I M E N S I O N S PW 38-Pin Thin Small Shrink Outline (TSSOP) 1 19 38 20 G H A B C D E F L M P MILLIMETERS INCHES Dim MIN MAX MIN MAX A 0.85 0.95 0.033 0.037 B 0.19 0.25 0.19 0.009 C 0.09 0.20 0.003 0.008 D 9.60 9.80 0.378 0.390 E 4.30 4.50 0.169 0.176 F 0.50 BSC 0.0196 BSC G 0.05 0.15 0.002 0.005 H – 1.10 – 0.043 L 0.50 0.75 0.020 0.030 M 0° 8° 0° 8° P 6.25 6.50 0.246 0.256 *LC – 0.10 – 0.004 LQ 38-Pin Plastic MLPQ (5x7mm EP) e A1 A3 E D A b 1 2 3 E2 D2 L Note: 1. Dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm(.006") on any side. Lead dimension shall not include solder coverage. MILLIMETERS INCHES Dim MIN MAX MIN MAX A 0.80 1.00 0.031 0.039 A1 0 0.05 0 0.002 A3 0.20 REF 0.008 REF b 0.18 0.30 0.007 0.011 D 5.00 BSC 0.196 BSC D2 3.00 3.25 0.118 0.127 E 7.00 BSC 0.275 BSC E2 5.00 5.25 0.196 0.206 e 0.50 BSC 0.019 BSC L 0.30 0.50 0.012 0.020 M M E E C C H H A A N N I I C C A A L L S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 16 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? N O T E S PRODUCTION DATA – Information contained in this document is proprietary to Microsemi and is current as of publication date. This document may not be modified in any way without the express written consent of Microsemi. Product processing does not necessarily include testing of all parameters. Microsemi reserves the right to change the configuration and performance of the product and to discontinue product at any time. N N O O T T E E S S
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LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 1 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? D E S C R I P T I O N The LX1676 is a highly integrated VRM power supply controller IC featuring two PWM switching regulator stages. The two constant frequency voltage-mode PWM phases are configured as a single biphase high current output core supply. In biphase operation, the high current (>25A) output is generated by a LoadSHARETM ? technique that balances the currents in the two phases. Power loss and noise, due to the ESR of the input capacitors, are minimized by operating the PWMs 180° out of phase. A synchronized Transient Correction Loop? provides except- ional control of the output droop and overshoot during very high di/dt load changes, the circuit can be configured for droop only, overshoot only or both. This architecture also minimizes capacitor requirements while maximizing regulator response. A true differential input amplifier is used for remote voltage sensing at the processor core. A VID code generator provides an internal reference that will set the output voltage. This VID code can be changed during operation and the reference will slew the output voltage to its new setting at a preset rate. During VID changes on the fly the Power Good indication will stay valid. Current through the lower phase 1 MOSFET will be sampled using its RDS(ON) for current limit and shut down. For further protection, an over voltage circuit will trip at a specified setting and clamp the output by turning off the upper MOSFETs and turning on the lower MOSFETs. The upper MOSFET drivers will use a bootstrap capacitor to provide the upper drive voltage over the input voltage range of 6 to 24 volts. IMPORTANT: For the most current data, consult MICROSEMI's website: http://www.microsemi.com ? Patent numbers US6292378,US6285571,US6356063, US6605931 K E Y F E A T U R E S ? High Current Biphase Operation ? Outputs As Low As 0.925V ? ? Biphase LoadSHARETM ? ? Transient Correction Loop Reduces Required Capacitance ? Differential Amplifier For Remote Voltage Sensing ? Integrated High Current MOSFET Drivers ? 200KHz to 1MHz Frequency Operation ? Programmable Slew Rate Control For Start-Up Sequence and VID change ? VID Changes On The Fly ? Power Good Indicator ? Short Circuit Protection ? Output Over Voltage and Under Voltage Protection ? No current-sense resistors A P P L I C A T I O N S ? AMD Mobile Athlon? or Duron? Processor Core Voltage Supply ? Voltage Regulator Modules P R O D U C T H I G H L I G H T L X 1 6 7 6 5 B i t V I D 7 0 n H T r a n s i e n t C o r r e c t i o n L o o p V i n 6 t o 2 4 V V i n 6 t o 2 4 V V o u t V i n + 5 V P A C K A G E O R D E R I N F O PW Plastic TSSOP 38-Pin LQ Plastic MLPQ 38-Pin TJ (°C) RoHS Compliant / Pb-free Transition DC: 0518 RoHS Compliant / Pb-free Transition DC: 0512 0 to 70 LX1676CPW LX1676CLQ Note: Available in Tape & Reel. Append the letters "TR" to the part number. (i.e. LX1676CLQ-TR) L L X X 1 1 6 6 7 7 6 6 LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 2 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? A B S O L U T E M A X I M U M R A T I N G S Supply Input Voltage (VCCL, VCC)0.3V to 6.0V Battery Input Voltage (VIN)0.3V to 24V Current Limit Sense (ILIM1, ILIM3)0.3V to 30V Topside Driver Supply Input Voltage (VC1, VC2, VC3)0.3 toVSx + 6.0V Topside Driver Return Input Voltage (VS1, VS2)5V to 24V Differential Sense Input Voltage (FB+, FB-0.3V to 6.0V VID0 – VID4, Input Voltage 0.3V to 6V High Side Driver Peak (<500ns) Current (HO1/2, I-MAX)1A Low Side Driver Peak (<500ns) Sink Current (LO1/2, I-MIN)1.5A Operating Junction Temperature.150°C Storage Temperature Range.65°C to 150°C Lead Temperature (Soldering 10 seconds)300°C RoHS Peak Package Solder Reflow Temperature (40 second maximum exposure)260°C (+0, -5) Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of specified terminal. P A C K A G E P I N O U T 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 FB- DFOUT EO1 EA1- DACOUT PWGD GND ROSC ENA VID4 VID3 PGN3 I-MIN VCCL LO2 PGN LO1 VS1 HO1 VC1 VC3 I-MAX ILIM3 ILIM1 LP1 LP2 EA2- EO2 FB+ VID2 VID1 VID0 VS2 HO2 VC2 VCC VIN VS3 Connect Bottom to Power GND LQ PACKAGE (Top View) 1 19 38 20 EA2- EO2 FB+ FB- DFOUT EO1 EA1- DACOUT PWGD GND VIN ROSC ENA VID4 VID3 VID2 VID1 VID0 VS2 HO2 VC2 VCC PGN3 I-MIN VCCL LO1 VS1 VC1 VC3 I-MAX VS3 ILIM3 ILIM1 LP1 LP2 LO2 PGN HO1 PW PACKAGE (Top View) RoHS / Pb-free 100% Matte Tin Lead Finish R E C O M M E N D E D O P E R A T I N G C O N D I T I O N S LX1676 Parameter Symbol Min Typ Max Units ` IC Input Supply Voltage VCC 4.5 5.5 V Battery Input Voltage VIN 5.7 24.0 V Biphase Topside Driver Return Voltage VS1, VS2 0 24.0 V Transient Correction Phase Driver Return Voltage VS3 0 5.5 V P P A A C C K K A A G G E E D D A A T T A A LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 3 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? F U N C T I O N A L P I N D E S C R I P T I O N Name Description FB+ Differential Amplifier Positive Input – Feedback from output FB- Differential Amplifier Negative Input – Feedback from output DFOUT Differential Amplifier Output EA1- Phase 1 Error Amplifier Negative Input EO1 Phase 1 Error Amplifier Output GND Analog Ground ROSC A resister to ground sets PWM frequency ENA Enable Input – Logic Low disables all converter phases DACOUT DAC Output voltage – 50uA bi-directional current source VID4 Digital Input for VID code – Has an internal pull-up resister VID3 Digital Input for VID code – Has an internal pull-up resister VID2 Digital Input for VID code – Has an internal pull-up resister VID1 Digital Input for VID code – Has an internal pull-up resister VID0 Digital Input for VID code – Has an internal pull-up resister PWGD Power Good Output Pin – Open drain output pin for power good indication. High = Power Good VCC IC Supply Voltage. Nominal +5V VC3 Supply for transient correction phase upper MOSFET driver, bootstrap voltage PGN3 Power ground pin for Transient Correction Loop driver I-MIN Output Driver for lower Transient Correction Loop MOSFET VS3 Low side of upper driver for Transient Correction Loop – MOSFET Driver power return I-MAX Output Driver for upper Transient Correction Loop MOSFET ILIM3 Transient Correction Loop current sense – A resister sets an upper limit for over current detection and shut down. LP1 Phase 2 differential amplifier positive input, filtered feedback from phase 1 output EA2- Negative Input of phase 2 integrating amplifier EO2 Output of phase 2 integrating amplifier LP2 Phase 2 differential amplifier negative input, filtered feedback from phase 2 output VIN Battery Voltage Input. LO2 Driver Output for phase 2 lower MOSFET VS2 Low side of upper gate driver for phase 2. HO2 Driver Output for phase 2 upper MOSFET VC2 Supply for phase 2 upper MOSFET driver, bootstrap voltage PGN Power ground pin for current sensing of lower MOSFET RDS(ON) for phase 1. LO1 Driver Output for phase 1 lower MOSFET ILIM1 Over-Current Limit Set – A resister sets an upper limit for over current detection and shut down. VS1 Low side of upper gate driver for phase #1. HO1 Driver Output for phase 1 upper MOSFET VC1 Supply for phase 1 upper MOSFET driver, bootstrap voltage VCCL Voltage bus for the lower MOSFET drivers. Nominal +5V P P A A C C K K A A G G E E D D A A T T A A LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 4 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? E L E C T R I C A L C H A R A C T E R I S T I C S Unless otherwise specified, the following specifications apply over the operating ambient temperature 0°C ≤ TA ≤ 70°C except where otherwise noted and the following test conditions: VCC = 5V, VCCL = 5V, VIN = 12V, Switching Frequency = 500KHz. LX1676 Parameter Symbol Test Conditions Min Typ Max Units ` REGULATOR ENA = VCC, FB+ = FB- 1 5 9 mA IC Supply Current IQ(VCC) ENA = GND 1 ?A Low Side Driver Operating Current IQ(VCCL) ENA = VCC, FB+ = FB- 0.5 1 mA High Side Driver Operating Current IQ(VCx) ENA = VCC, FB+ = FB- 2 4 mA ` ERROR AMPLIFIER: PHASE 1 Input Offset Voltage VOS Common Mode Voltage (VCM) = 1.4V -6 6 mV Input Bias Current IEA1 -100 100 nA DC Open Loop Gain 60 70 dB Input Common Mode Range VICM CMRR > 50dB 0.8 2.5 V VEO1(MAX) IEA1 = 2mA 4.0 Output Voltage Swing VEO1(MIN) IEA1 = -20uA 0.15 0.5 V Unity Gain Bandwidth UGBW 20 MHz ` DIFFERENTIAL AMPLIFIER Input Offset Voltage VOS VCM=1.4V -6 6 mV Gain ADA 0.99 1 1.01 V/V Common Mode Rejection Ratio CMRRDA 0.8V < VCM < 2.5V 65 dB Input Resistance RIN Measured at FB+ Input 30 K? Input Common Mode Range VCM 0 3 V Source / Sink Current VDFOUT = 0V 5 mA VDFOUT(MAX) IDFOUT = 2mA 4.0 Output Voltage Swing VDFOUT (MIN) IEA1 = -20uA 0.2 V Unity Gain Bandwidth UGBW 10 MHz Slew Rate SR 5 V/?s ` OSCILLATOR Maximum Clock Frequency fMAX RPWM=10k? 0.9 1 1.1 MHz Minimum Clock Frequency fMIN RPWM=50k? 180 200 220 KHz Frequency Stability 4 % ` PWM OUTPUT During Transient Correction Switching 100 Maximum Duty Cycle DCMAX Transient Correction Not Switching 40 50 % Minimum Pulse Width tPWM(MIN) 3000pF Load 60 nS Dead Time 3000pF Load at 50% of VCCL 50 80 200 nS VIN = 6V 0.70 VIN = 12 1.40 Ramp Amplitude VRAMP VIN = 24 V 2.80 V ` PHASE 2 INTEGRATING AMPLIFIER Input Offset Voltage VOS VCM=1.4V -6 6 M V DC Open Loop Gain 70 dB VEO2(MAX) IEA2 = 2mA 4.0 Output Voltage Swing VEO2(MIN) IEA2 = -20uA 0.15 0.5 V Unity Gain Bandwidth UGBW 20 MHz E E L L E E C C T T R R I I C C A A L L S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 5 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? E L E C T R I C A L C H A R A C T E R I S T I C S ( C O N T I N U E D ) Unless otherwise specified, the following specifications apply over the operating ambient temperature 0°C ≤ TA ≤ 70°C except where otherwise noted and the following test conditions: VCC = 5V, VCCL = 5V, VIN = 12V, Switching Frequency = 500KHz. LX1676 Parameter Symbol Test Conditions Min Typ Max Units ` PHASE 2 DIFFERENTIAL AMPLIFIER Input Offset Voltage VOS LP1=LP2 -6 6 mV Gain ADA 0.98 1 1.02 V/V Common Mode Rejection Ratio CMRRDA Common Mode Voltage = 0 to 2 V 60 dB Input Resistance RB 180 K? Unity Gain Bandwidth UGBW 4 MHz ` TRANSIENT CONTROL LOOP Voltage Droop Sense Propagation Delay : FB+ and FB- to I-MAX 50 nS Voltage Overshoot Sense Propagation Delay : FB+ and FB- to I-MIN 50 nS Voltage Droop Sense Threshold VDFOUT Rising 3000pF Load 40 mV Voltage Overshoot Sense Threshold VDFOUT Falling 3000pF Load 40 mV ` OUTPUT DRIVERS Driver ? Rise Time ? Fall Time tRISE tFALL CL = 3000pF, VCx - VSx = 5V 50 50 nS High Side Driver Voltage: [VHOx - VVSx] ? Drive High ? Drive Low VHOx = 20mA, VCx - VSx = 5.0 V VHOx = -20mA, VCx - VSx = 5.0 V 4.8 4.9 0.1 0.2 V Low Side Driver Voltage: [VLOx – VPGN] ? Drive High ? Drive Low VLOx = 20mA, VCCL - VPGN = 5.0 V VLOx = -20mA, VCCL - VPGN = 5.0 V 4.8 4.9 0.1 0.2 V High Side Driver Current IHOx VCx - VSx = 5.0 V, Load = 3300pf at <500nSec 1 A Lower MOSFET Driver Current ILOx VCCL - PGN = 5.0 V, Load = 3300pf at <500nSec 1.5 A ` PHASE 1 OVER CURRENT PROTECTION Current Sense Bias Current IILIM1 44 50 60 ?A Current Sense Delay tCSD(ILIM1) 200 400 500 nS ` TRANSIENT CORRECTION LOOP OVER CURRENT PROTECTION Current Sense Bias Current IILIM3 40 50 60 ?A Current Sense Delay tCSD(ILIM3) 200 400 500 nS ` ENABLE INPUT / VOLTAGE IDENTIFICATION (VID) Logic Low Threshold 1.5 V Hysteresis 0.3 V Pullup Resistance 100 K? ` POWER GOOD Low Output Voltage VPWGD IPWGD = -3mA 0.5 V E E L L E E C C T T R R I I C C A A L L S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 6 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? E L E C T R I C A L C H A R A C T E R I S T I C S ( C O N T I N U E D ) Unless otherwise specified, the following specifications apply over the operating ambient temperature 0°C ≤ TA ≤ 70°C except where otherwise noted and the following test conditions: VCC = 5V, VCCL = 5V, VIN = 12V, Switching Frequency = 500KHz. LX1676 Parameter Symbol Test Conditions Min Typ Max Units ` UVLO VCC ? Threshold ? Hysteresis VCC Rising 4.2 0.3 VIN ? Threshold ? Hysteresis VIN Rising 5.5 0.3 V ` OVER VOLTAGE PROTECTION Over Voltage Threshold - 2.35 V ` UNDER VOLTAGE PROTECTION Under Voltage Threshold 0.800 V ` DAC 1 ≤ VDACOUT ≤1.4 1 Initial DACOUT Accuracy 0.925 ≤ VDACOUT < 1 1.4 < VDACOUT ≤ 2 2 % High Side Driver Current IHOx VCx - VSx = 5.0 V, Load = 3300pf at <500nSec 1 A Lower MOSFET Driver Current ILOx VCCL - PGN = 5.0 V, Load = 3300pf at <500nSec 1.5 A VID Logic High Threshold 0.5 1.3 2 V VID Hysteresis 0.3 V V O L T A G E I D E N T I F I C A T I O N ( V I D ) C O D E VID[4:0] VOUT (V) VID[4:0] VOUT (V) 00000 2.000 10000 1.275 00001 1.950 10001 1.250 00010 1.900 10010 1.225 00011 1.850 10011 1.200 00100 1.800 10100 1.175 00101 1.750 10101 1.150 00110 1.700 10110 1.125 00111 1.650 10111 1.100 01000 1.600 11000 1.075 01001 1.550 11001 1.050 01010 1.500 11010 1.025 01011 1.450 11011 1.000 01100 1.400 11100 0.975 01101 1.350 11101 0.950 01110 1.300 11110 0.925 01111 Shutdown 11111 Shutdown E E L L E E C C T T R R I I C C A A L L S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 7 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? S I M P L I F I E D B L O C K D I A G R A M + - 0.85 2.35 + - + - UV OV Band- gap UVLO VCC VIN + - R S S R gm IMAX IMIN GND VCC ROSC VIN PWGD VID4 VID3 VID2 VID1 VID0 DACOUT FB + FB - VCCL VC1 HO1 LO1 VS1 PGN HO2 VS2 LO2 VCCL PGOOD S R S S S 0° LP2 LP1 ENA ENA VC3 I-Max VS3 I-Min PGN3 EO1 EA1 - DFOUT EO2 EA2 - 50?A VC2 + - + - Bandgap 180° DACOUT - 30mV + + + _ _ 35mV offset DACOUT DAC AMP FRQ OSC VIN 180° 0° + _ _ _ + Diff Amp Phase 1 Error Amp Phase 2 Differential Amp Phase 2 Integrating Amp S DACOUT 35mV offset 100K 90K 90K 90K 90K POR PGOOD Q Q I-MAX I-MAX I-MIN I-MIN ILIM ILIM ILIM ILIM3 ILIM1 PGN VS3 Fault B B L L O O C C K K D D I I A A G G R R A A M M LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 8 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? A P P L I C A T I O N C I R C U I T S LX1676 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 CORE FB- R6 4.02K R7 100K CORE FB- C5 0.22?F C4 4700pF Q1 NDS7002A R9 10K Q2 NDS7002A +5VP C7 10?F 25V VBAT R10 45.3K PWRGD EN R13 100K R14 100K R15 100K R16 100K R17 100K 2.5V VID(4) VID(3) VID(2) VID(1) VID(0) R1 2K C1 4700pF C2 4700pF R2 61.9K C3 4700pF R3 61.9K R4 4.02K R5 4.02K R21 10 Ohm C8 4.7?F 6.3V +5VP C9 4.7?F 6.3V C10 4.7?F 6.3V C11 4.7?F 6.3V Q3 IRF7811W C12 0.22?F CR3 UPS5817 +5VP C13 47?f 6.3v CR1 SK32 CR2 SK32 L3 70?H Q4 IRF7811W FB- DFOUT EO1 EA1- DACOUT PWRGD GND VIN ROSC ENA VID4 VID3 VID2 VID1 VID0 VS2 HO2 VC2 VCC PGN3 FB+ EO2 EA2- LP2 LP1 ILIM ILIM3 VS3 I-MAX VC3 VC1 HO1 VS1 LO1 PGN LO2 VCCL I-MIN Q5 IRF7811W Q6 IRF7822 VBAT C20 10?F 25V C19 10?F 25V C21 10?F 25V C105 10?F C15 0.22?F C4 UPS5817 +5VP Q7 IRF7822 CR8 N/U L1 3.3?H Q8 IRF7811W VBAT C23 10?F 25V C22 10?F 25V C24 10?F 25V C104 10?F Q9 IRF7822 Q10 IRF7822 CR7 N/U L2 3.3?H C17 0.22?F CR5 UPS5817 +5VP C25 VCORE VCORE RTN +5VP C103 47?F 6.3V VBAT C18 10?F 25V NOTE: Q7 & Q10 Optional C25 Several Capacitors Under Processor Socket Figure 2– Typical VRM Application A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 9 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? T H E O R Y O F O P E R A T I O N GENERAL DESCRIPTION The LX1676 is a voltage-mode pulse-width modulation controller integrated circuit. The PWM frequency is programmable from 200kHz to 1MHz. The device has external compensation, for more flexibility of the loop response. The LX1676 also makes use of a true differential input amplifier for remote voltage sensing at the actual processor core. This is a very important feature now that the core voltages are in the 1 to 2 volt range. The reference for the biphase PWM output is a 5 bit VID code DAC. The VID code DAC can generate a reference voltage of 0.925 to 2.000 volts. The output of the DAC is a bi-directional current source and is connected to the DACOUT pin. Connecting a capacitor from this pin to ground will generate a linear ramp, which will determine the rate of change of the output voltage. The rate of change can be set so that the current required to charge the total output capacitance is below the maximum current limit trip point. This will allow VID changes on the fly without tripping the over current sensor. POWER UP AND INITIALIZATION At power up, the LX1676 monitors the supply voltage to VCC and Vin, Before both supplies reach their under- voltage lock-out (UVLO) thresholds, a power on reset condition will prevent soft-start from beginning, the oscillator is disabled and all MOSFETs are kept off. SOFT-START Once the supplies are above the UVLO threshold and the Enable pin is brought high, the soft-start capacitor begins to be charged up by the reference DAC through the DACOUT pin. The capacitor voltage at the DACOUT pin rises as a linear ramp. The DACOUT pin is connected to the error amplifier's non-inverting input which controls the output voltage. The output voltage will follow the DACOUT pin voltage. Phase 3 (hysteretic phase) is disabled during soft-start. OVER-CURRENT PROTECTION There are two separate current limit circuits in the LX1676. One looks at the phase 1 lower MOSFET drain current and the second looks at the phase 3 upper MOSFET drain current. Both circuits have a 400 nS delay before a current limit command is issued to the current limit latch, once set the current limit latch will hold all three phases off until it is reset. The Over-Current Protection is disabled during positive VID changes. To reset the current limit latch either the enable command (ENA) must be cycled low then back high or the input power must cycle off and then back on. OVER-CURRENT PROTECTION (PHASE 1) The phase 1 current limit uses the RDS(ON) of the lower MOSFET, together with a resistor (RSET) to set the actual current limit point. The current limit comparator senses the current 400 nS after the lower MOSFET is switched on. A current source supplies a current (ISET), of 50?A which flows into RSET and determines the current limit trip point. The value of RSET is selected to set the current limit for the application. Phase 1 RSET is calculated by: A 50 R ILimit R DS(ON) SET ? ? = The current limit comparator will trip when the drop across RSET equals the drop across the lower MOSFET RDS(ON)., at this time the comparator outputs a signal to set the I limit latch and removes the enable command. The Over-Current sensing is done on phase 1 only because phase 2 current is always being forced to equal the phase 1 current, therefore the current trip point is set at half of the desired current limit. For an output current limit setting of 30 amps, the current trip point for phase 1 is set at 15 amps. When the phase 1 over current latch is set all three phases are disabled, all MOSFETs are turned off. Vout 50 uA + _ RSET Q2 Q2 Current Flow + + _ _ Iout Current Limit Comparator Q1 Vin RDS(ON) 400nSec Delay Figure 3 – Phase 1 Current Limit The delay before current limit is activated will result in current pulses exceeding the calculated values during the delay period if a short circuit is applied during that time. A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 10 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? T H E O R Y O F O P E R A T I O N ( C O N T I N U E D ) OVER-CURRENT PROTECTION (PHASE 3) The hysteretic phase has its own current limit protection because with it's very fast response time with a 100 nH inductor the upper MOSFET cannot be allowed to stay on during an output short circuit condition. The phase 3 over- current sensing uses the RDS(ON) of the upper MOSFET with a resistor RSET to determine the over current limit point. A current source draws 50uA through RSET which determines the required drop across the MOSFET RDS(ON) to initiate a current limit condition. 50 uA + _ RSET Q2 + + _ _ Current Limit Comparator Q1 Vin RDS(ON) Vout 400nS Delay ILIM3 VS3 Figure 4 – Phase 3 Current Limit Phase 3 RSET is calculated by: uA 50 RDSon ILimit Rset ? = OVER VOLTAGE PROTECTION An over voltage protection circuit monitors the output voltage and will latch all three phases off if an over voltage condition (greater than 2.35 V) is detected. Both MOSFETs for phase 3 will be held off and the lower MOSFETs for phase 1 and 2 will be held on to discharge the output capacitor till the output voltage drops below .85 volt, at .85 volts all MOSFETs will be turned off. FAULT LOGIC There are a number of possible states that will cause a fault condition that will disable the output MOSFET drivers. A fault condition will be caused by the following: ? Enable (ENA) pin being pulled low ? Over-current condition on either phase 1 or phase 3 ? Over Voltage output > 2.35V ? Under Voltage output < 0.85V In all cases except Over Voltage all MOSFET drivers will be latched off. For an Over Voltage fault the lower MOSFETs for phase 1 and 2 will be held on to discharge the bulk capacitance on the output till a lower limit of .85 volts is reached then all MOSFETS will be turned off. To reset a fault it necessary to cycle the ENA pin low then back high or remove and reapply the input voltage VIN. The Under Voltage monitor is not enabled until the output voltage has ramped up to the level commanded by the DACOUT pin and the PWGD output in high. PWM FREQUENCY An external resistor sets the PWM frequency from the ROSC pin to ground. The equation for ROSC is: ( ) 9 e 100 f K 1 ROSC ? + ? = where ROSC is in K?, f is in Hz, K=105e-12 A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 11 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? T H E O R Y O F O P E R A T I O N ( C O N T I N U E D ) THEORY OF OPERATION FOR A BI-PHASE, LOADSHARETM CONFIGURATION The basic principle used in LoadSHARETM in a multiple phase buck converter topology is that if multiple, identical, inductors have the same identical voltage impressed across their leads, they must then have the same identical current passing through them. The current that we would like to balance between inductors is mainly the DC component along with as much as possible the transient current. All inductors in a multiphase buck converter topology have their output side tied together at the output filter capacitors. Therefore this side of all the inductors has the same identical voltage. If the input side of the inductors can be forced to have the same equivalent DC potential on this lead, then they will have the same DC current flowing. To achieve this requirement, phase 1 will be the control phase that sets the output operating voltage, under normal PWM operation. To force the current of phase 2 to be equal to the current of phase 1; a second feedback loop is used. Phase 2 has a low pass filter connected from the input side of each inductor. This side of the inductors has a square wave signal that is proportional to its duty cycle. The output of each LPF is a DC (+ some AC) signal that is proportional to the magnitude and duty cycle of its respective inductor signal. The second feedback loop will use the output of the phase 1 LPF as a reference signal for an error amplifier that will compare this reference to the output of the phase 2 LPF. This error signal will be amplified and used to control the PWM circuit of phase 2. Therefore, the duty cycle of phase 2 will be set so that the equivalent voltage potential will be forced across the phase 2 inductor as compared to the phase 1 inductor. This will force the current in the phase 2 inductor to follow and equal the phase 1 inductor current. With the LoadSHARETM topology it is possible to imbalance the phases so that one phase will supply more current than the other under unique situations. The LX1676 will normally be used with the same supply voltages on phase 1 and 2 PWM inputs and will have equal currents in both phases. + - LP2 LP1 Phase 1 Comparator + _ + _ + - gm Phase 2 Comparator 0° 180° Phase 2 Integrating Amp Differential Amp + - DC Bias Phase 1 Error Amp + - PWM PWM HO1 EA - EO2 LO1 LO2 HO2 Phase 1 Low Pass Filter Phase 2 Low Pass Filter Vout DC Bias DC Bias DACOUT Differential Feedbach From Vout Phase 1 Diff Amp Ramp .75 V to 3 V Both PWMs Figure 5 – LoadSHARE Control Loop A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 12 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? T H E O R Y O F O P E R A T I O N ( C O N T I N U E D ) LOOP GAIN AUTOMATIC COMPENSATION The PWM ramp shown in Figure 5 is automatically adjusted to keep its amplitude fixed ratio to Vin over the range of 6 to 24 V input. This maintains a constant loop gain that is set by the feedback networks around the error amplifiers independent of PWM input voltage. TRANSIENT CORRECTION LOOP Phase 3 is a Transient Correction Loop that can sum a large amount of current into the output node when required by an out of range condition. The differential feedback summing amplifier is connected directly to the output terminals and has sufficient bandwidth to follow any fast changes in output voltage. The feedback error voltage is compared to the commanded reference voltage (DACOUT) by two high speed comparators, I-Max and I-Min. The other inputs of these comparators are offset from the DACOUT as shown in Fig 6. If the error in output voltage exceeds the offset in either direction the appropriate MOSFET will be turned on to force current into or out of the output node to correct the voltage error. The very low value inductor (100nH) allows large amounts of current to be forced into or out of the output node very quickly. When the Transient Correction Loop is switching it forces the appropriate upper or lower MOSFETs in phases 1 and 2 to stay on (100% or 0% duty cycle) until the error is corrected. The two drivers for the Transient Correction Loop have outputs (I-Max) and (I-Min) that may be used to drive a half bridge to correct for both low and high output voltage conditions. This permits pulling the output low if an overshoot occurs due to a rapid reduction in load current. With a conventional Buck regulator rapid changes in the negative direction are not possible due to the low voltage available as a forcing function. The two outputs (I-MAX and I-MIN) are completely independent. A single MOSFET and diode can be used to correct for voltage droop only or voltage overshoot only when driven by the appropriate output. If the I-MAX driver is not used the VC3 and VS3 pins must be connected to +5 volts. Under normal operation the Transient Correction phase is only active for a very brief time during high di/dt loads on the output. VC3 I-Min PGN3 - 35mV 35mV VS3 I-Max VCCL I-Min Comparator I-Max Comparator FB- FB+ + - DACOUT Differential Feedback FromOutput + + - 70nH Vout +5 Figure 6 – Phase 3 Transient Correction Loop A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 13 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? A P P L I C A T I O N N O T E OUTPUT INDUCTOR The output inductor should be selected to meet the requirements of the output voltage ripple in steady-state operation and the inductor current slew-rate during transient. The peak-to-peak output voltage ripple is: RIPPLE RIPPLE I ESR V * = where s D L V V ?I OUT IN f * ? = ?I is the inductor ripple current, L is the output inductor value and ESR is the Effective Series Resistance of the output capacitor. ?I should typically be in the range of 20% to 40% of the maximum output current. Higher inductance results in lower output voltage ripple, allowing slightly higher ESR to satisfy the transient specification. Higher inductance also slows the inductor current slew rate in response to the load- current step change, ?I, resulting in more output-capacitor voltage droop. When using electrolytic capacitors, the capacitor voltage droop is usually negligible, due to the large capacitance The inductor-current rise and fall times are: ( ) OUT IN RISE V V ?I L T ? * = and OUT FALL V ?I L T * = . The inductance value can be calculated by: s D ?I V V L OUT IN f * ? = OUTPUT CAPACITOR The output capacitor is sized to meet ripple and transient performance specifications. Effective Series Resistance (ESR) is a critical parameter. When a step load current occurs, the output voltage will have a step that equals the product of the ESR and the current step, ?I. In an advanced microprocessor power supply, the output capacitor is usually selected from ESR instead of capacitance or RMS current capability. A capacitor that satisfies the ESR requirements usually has a larger capacitance and current capability than strictly needed The allowed ESR can be found by: ( ) EX RIPPLE V ?I I ESR < + * Where IRIPPLE is the inductor ripple current, ?I is the maximum load current step change, and VEX is the allowed output voltage excursion in the transient. Electrolytic capacitors can be used for the output capacitor, but are less stable with age than tantalum capacitors. As they age, their ESR degrades, reducing the system performance and increasing the risk of failure. It is recommended that multiple parallel capacitors be used, so that, as ESR increase with age, overall performance will still meet the processor's requirements. There is frequently strong pressure to use the least expensive components possible, however, this could lead to degraded long-term reliability, especially in the case of filter capacitors. Microsemi's demonstration boards use the CDE Polymer AL-EL (ESRE) filter capacitors, which are aluminum electrolytic, and have demonstrated reliability. The OS-CON series from Sanyo generally provides the very best performance in terms of long term ESR stability and general reliability, but at a substantial cost penalty. The CDE Polymer AL-EL (ESRE) filter series provides excellent ESR performance at a reasonable cost. Beware of off-brand, very low-cost filter capacitors, which have been shown to degrade in both ESR and general electrolytic characteristics over time. INPUT CAPACITOR The input capacitor and the input inductor, if used, are to filter the pulsating current generated by the buck converter to reduce interference to other circuits connected to the same 5V rail. In addition, the input capacitor provides local de-coupling for the buck converter. The capacitor should be rated to handle the RMS input current requirement. The RMS input current is: d) 5 . 0 d( I I L RMS ? = for d < 0.5 Where IL is the inductor current and d is the duty cycle. The maximum RMS value of 0.25IL will occur when d = 25% or 75%. A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 14 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? A P P L I C A T I O N N O T E ( C O N T I N U E D ) SOFT-START CAPACITOR An external soft-start capacitor is connected to the DACOUT pin and will be charged, or discharged, at a linear rate by the internal 50uA bi-directional current source after the UVLO circuit has been satisfied. Whenever the VID code is changed during normal operation the soft-start capacitor will determine the rate of change at the output. PROGRAMMING THE OUTPUT VOLTAGE Output voltage is determined by the internal 5 bit DAC. The DAC inputs are the Voltage Identification (VID) 0-4 lines, the VID table lists the available output voltages for the corresponding VID codes. There are no external resistor dividers to program output voltage and only the steps listed are available. A A P P P P L L I I C C A A T T I I O O N N S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 15 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? P A C K A G E D I M E N S I O N S PW 38-Pin Thin Small Shrink Outline (TSSOP) 1 19 38 20 G H A B C D E F L M P MILLIMETERS INCHES Dim MIN MAX MIN MAX A 0.85 0.95 0.033 0.037 B 0.19 0.25 0.19 0.009 C 0.09 0.20 0.003 0.008 D 9.60 9.80 0.378 0.390 E 4.30 4.50 0.169 0.176 F 0.50 BSC 0.0196 BSC G 0.05 0.15 0.002 0.005 H – 1.10 – 0.043 L 0.50 0.75 0.020 0.030 M 0° 8° 0° 8° P 6.25 6.50 0.246 0.256 *LC – 0.10 – 0.004 LQ 38-Pin Plastic MLPQ (5x7mm EP) e A1 A3 E D A b 1 2 3 E2 D2 L Note: 1. Dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm(.006") on any side. Lead dimension shall not include solder coverage. MILLIMETERS INCHES Dim MIN MAX MIN MAX A 0.80 1.00 0.031 0.039 A1 0 0.05 0 0.002 A3 0.20 REF 0.008 REF b 0.18 0.30 0.007 0.011 D 5.00 BSC 0.196 BSC D2 3.00 3.25 0.118 0.127 E 7.00 BSC 0.275 BSC E2 5.00 5.25 0.196 0.206 e 0.50 BSC 0.019 BSC L 0.30 0.50 0.012 0.020 M M E E C C H H A A N N I I C C A A L L S S LX1676 PRODUCTION DATA SHEET Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 16 WWW . Microsemi . C OM Mobile AMD Athlon? VRM Controller Copyright ? 2000 Revision: 1.0, 4/12/2005 TM ? N O T E S PRODUCTION DATA – Information contained in this document is proprietary to Microsemi and is current as of publication date. This document may not be modified in any way without the express written consent of Microsemi. Product processing does not necessarily include testing of all parameters. Microsemi reserves the right to change the configuration and performance of the product and to discontinue product at any time. N N O O T T E E S S